The present invention relates to semiconductor device fabrication and integrated circuits and, more specifically, to structures for laterally-diffused metal-oxide-semiconductor devices and drain-extended metal-oxide-semiconductor devices, as well as methods of forming laterally-diffused metal-oxide-semiconductor devices and drain-extended metal-oxide-semiconductor devices.
Device structures for a field-effect transistor generally include a source, a drain, and a gate electrode configured to switch carrier flow in a channel region arranged between the source and drain. When a control voltage exceeding a designated threshold voltage is applied to the gate electrode, carrier flow occurs in the channel region to produce a device output current. A fin-type field-effect transistor provides a device structure that that has better electrostatic control of the channel region for improved Ion/Ioff compared to planar field-effect transistors.
Planar field-effect transistors and fin-type field-effect transistors constitute a general category of field-effect transistor structures in which the direction of gated current in the channel region is in a horizontal direction parallel to the substrate surface. A vertical-transport field-effect transistor is a different type of field-effect transistor in which the source and the drain are respectively arranged at the top and bottom of a semiconductor fin. The channel region of a vertical-transport field-effect transistor is arranged in the semiconductor fin between the source and the drain. The direction of gated current in the channel region of a vertical-transport field-effect transistor is in a vertical direction relative to the substrate surface and, therefore, in a direction that is parallel to the height of the semiconductor fin.
High-voltage integrated circuits used, for example, in microwave/RF power amplifiers typically require specialized circuit technology capable of withstanding higher voltages. Laterally-diffused metal-oxide-semiconductor (LDMOS) devices and drain-extended metal-oxide-semiconductor (DEMOS) devices are designed to handle higher voltages than, for example, logic field-effect transistors and may include features such as an extended drain. LDMOS and DEMOS devices are commonly implemented in planar device technologies.
Improved structures for LDMOS and DEMOS devices and methods of forming LDMOS and DEMOS devices are needed.